wgpu_hal/auxil/
mod.rs

1// Mostly DX12-only, but also compiled for Vulkan-on-Windows, which reuses
2// `dxgi::hdr` to query display HDR info. The DX12-only submodules stay gated
3// behind `dx12` in `dxgi/mod.rs`.
4#[cfg(any(dx12, all(vulkan, windows)))]
5pub(super) mod dxgi;
6
7#[cfg(any(dx12, all(vulkan, windows)))]
8pub(super) mod dyn_lib;
9
10#[cfg(all(native, feature = "renderdoc"))]
11pub(super) mod renderdoc;
12
13pub mod db {
14    pub mod amd {
15        /// cbindgen:ignore
16        pub const VENDOR: u32 = 0x1002;
17    }
18    pub mod apple {
19        /// cbindgen:ignore
20        pub const VENDOR: u32 = 0x106B;
21    }
22    pub mod arm {
23        /// cbindgen:ignore
24        pub const VENDOR: u32 = 0x13B5;
25    }
26    pub mod broadcom {
27        /// cbindgen:ignore
28        pub const VENDOR: u32 = 0x14E4;
29    }
30    pub mod imgtec {
31        /// cbindgen:ignore
32        pub const VENDOR: u32 = 0x1010;
33    }
34    pub mod intel {
35        /// cbindgen:ignore
36        pub const VENDOR: u32 = 0x8086;
37        pub const DEVICE_KABY_LAKE_MASK: u32 = 0x5900;
38        pub const DEVICE_SKY_LAKE_MASK: u32 = 0x1900;
39    }
40    pub mod mesa {
41        // Mesa does not actually have a PCI vendor id.
42        //
43        // To match Vulkan, we use the VkVendorId for Mesa in the gles backend so that lavapipe (Vulkan) and
44        // llvmpipe (OpenGL) have the same vendor id.
45        /// cbindgen:ignore
46        pub const VENDOR: u32 = 0x10005;
47    }
48    pub mod nvidia {
49        /// cbindgen:ignore
50        pub const VENDOR: u32 = 0x10DE;
51    }
52    pub mod qualcomm {
53        /// cbindgen:ignore
54        pub const VENDOR: u32 = 0x5143;
55    }
56}
57
58/// Maximum binding size for the shaders that only support `i32` indexing.
59/// Interestingly, the index itself can't reach that high, because the minimum
60/// element size is 4 bytes, but the compiler toolchain still computes the
61/// offset at some intermediate point, internally, as i32.
62pub const MAX_I32_BINDING_SIZE: u32 = (1 << 31) - 1;
63
64pub use wgpu_naga_bridge::map_naga_stage;
65
66impl crate::CopyExtent {
67    pub fn map_extent_to_copy_size(extent: &wgt::Extent3d, dim: wgt::TextureDimension) -> Self {
68        Self {
69            width: extent.width,
70            height: extent.height,
71            depth: match dim {
72                wgt::TextureDimension::D1 | wgt::TextureDimension::D2 => 1,
73                wgt::TextureDimension::D3 => extent.depth_or_array_layers,
74            },
75        }
76    }
77
78    pub fn min(&self, other: &Self) -> Self {
79        Self {
80            width: self.width.min(other.width),
81            height: self.height.min(other.height),
82            depth: self.depth.min(other.depth),
83        }
84    }
85
86    // Get the copy size at a specific mipmap level. This doesn't make most sense,
87    // since the copy extents are provided *for* a mipmap level to start with.
88    // But backends use `CopyExtent` more sparingly, and this piece is shared.
89    pub fn at_mip_level(&self, level: u32) -> Self {
90        Self {
91            width: (self.width >> level).max(1),
92            height: (self.height >> level).max(1),
93            depth: (self.depth >> level).max(1),
94        }
95    }
96}
97
98impl crate::TextureCopyBase {
99    pub fn max_copy_size(&self, full_size: &crate::CopyExtent) -> crate::CopyExtent {
100        let mip = full_size.at_mip_level(self.mip_level);
101        crate::CopyExtent {
102            width: mip.width - self.origin.x,
103            height: mip.height - self.origin.y,
104            depth: mip.depth - self.origin.z,
105        }
106    }
107}
108
109impl crate::BufferTextureCopy {
110    pub fn clamp_size_to_virtual(&mut self, full_size: &crate::CopyExtent) {
111        let max_size = self.texture_base.max_copy_size(full_size);
112        self.size = self.size.min(&max_size);
113    }
114}
115
116impl crate::TextureCopy {
117    pub fn clamp_size_to_virtual(
118        &mut self,
119        full_src_size: &crate::CopyExtent,
120        full_dst_size: &crate::CopyExtent,
121    ) {
122        let max_src_size = self.src_base.max_copy_size(full_src_size);
123        let max_dst_size = self.dst_base.max_copy_size(full_dst_size);
124        self.size = self.size.min(&max_src_size).min(&max_dst_size);
125    }
126}
127
128/// Adjust `limits` to honor HAL-imposed maximums and comply with WebGPU's
129/// adapter capability guarantees.
130#[cfg_attr(not(any_backend), allow(dead_code))]
131pub(crate) fn adjust_raw_limits(mut limits: wgt::Limits) -> wgt::Limits {
132    // Apply hal limits.
133    limits.max_bind_groups = limits.max_bind_groups.min(crate::MAX_BIND_GROUPS as u32);
134    limits.max_vertex_buffers = limits
135        .max_vertex_buffers
136        .min(crate::MAX_VERTEX_BUFFERS as u32);
137    // Once we allow the 2 limits above to be higher than 24 we should use
138    // `cap_limits_to_be_under_the_sum_limit` to cap them under
139    // `max_bind_groups_plus_vertex_buffers`.
140    const { assert!(crate::MAX_BIND_GROUPS + crate::MAX_VERTEX_BUFFERS == 24) };
141    limits.max_bind_groups_plus_vertex_buffers = limits.max_bind_groups_plus_vertex_buffers.min(24);
142    limits.max_color_attachments = limits
143        .max_color_attachments
144        .min(crate::MAX_COLOR_ATTACHMENTS as u32);
145
146    // Adjust limits according to WebGPU adapter capability guarantees.
147    // See <https://gpuweb.github.io/gpuweb/#adapter-capability-guarantees>.
148
149    // WebGPU requires maxBindingsPerBindGroup to be at least the sum of all
150    // per-stage limits multiplied with the maximum shader stages per pipeline.
151    //
152    // Since backends already report their maximum maxBindingsPerBindGroup,
153    // we need to lower all per-stage limits to satisfy this guarantee.
154    const MAX_SHADER_STAGES_PER_PIPELINE: u32 = 2;
155    let max_per_stage_resources =
156        limits.max_bindings_per_bind_group / MAX_SHADER_STAGES_PER_PIPELINE;
157
158    cap_limits_to_be_under_the_sum_limit(
159        [
160            &mut limits.max_sampled_textures_per_shader_stage,
161            &mut limits.max_uniform_buffers_per_shader_stage,
162            &mut limits.max_storage_textures_per_shader_stage,
163            &mut limits.max_storage_buffers_per_shader_stage,
164            &mut limits.max_samplers_per_shader_stage,
165            &mut limits.max_acceleration_structures_per_shader_stage,
166        ],
167        max_per_stage_resources,
168    );
169
170    // Not required by the spec but dynamic buffers count
171    // towards non-dynamic buffer limits as well.
172    limits.max_dynamic_uniform_buffers_per_pipeline_layout = limits
173        .max_dynamic_uniform_buffers_per_pipeline_layout
174        .min(limits.max_uniform_buffers_per_shader_stage);
175    limits.max_dynamic_storage_buffers_per_pipeline_layout = limits
176        .max_dynamic_storage_buffers_per_pipeline_layout
177        .min(limits.max_storage_buffers_per_shader_stage);
178
179    limits.min_uniform_buffer_offset_alignment = limits.min_uniform_buffer_offset_alignment.max(32);
180    limits.min_storage_buffer_offset_alignment = limits.min_storage_buffer_offset_alignment.max(32);
181
182    limits.max_uniform_buffer_binding_size = limits
183        .max_uniform_buffer_binding_size
184        .min(limits.max_buffer_size);
185    limits.max_storage_buffer_binding_size = limits
186        .max_storage_buffer_binding_size
187        .min(limits.max_buffer_size);
188
189    limits.max_storage_buffer_binding_size &= !(u64::from(wgt::STORAGE_BINDING_SIZE_ALIGNMENT) - 1);
190    limits.max_vertex_buffer_array_stride &= !(wgt::VERTEX_ALIGNMENT as u32 - 1);
191
192    let x = limits.max_compute_workgroup_size_x;
193    let y = limits.max_compute_workgroup_size_y;
194    let z = limits.max_compute_workgroup_size_z;
195    let m = limits.max_compute_invocations_per_workgroup;
196    limits.max_compute_workgroup_size_x = x.min(m);
197    limits.max_compute_workgroup_size_y = y.min(m);
198    limits.max_compute_workgroup_size_z = z.min(m);
199    limits.max_compute_invocations_per_workgroup = m.min(x.saturating_mul(y).saturating_mul(z));
200
201    limits.max_immediate_size = limits.max_immediate_size.min(256);
202
203    limits
204}
205
206/// Evenly allocates space to each limit,
207/// capping them only if strictly necessary.
208pub fn cap_limits_to_be_under_the_sum_limit<const N: usize>(
209    mut limits: [&mut u32; N],
210    sum_limit: u32,
211) {
212    limits.sort();
213
214    let mut rem_limit = sum_limit;
215    let mut divisor = limits.len() as u32;
216    for limit_to_adjust in limits {
217        let limit = rem_limit / divisor;
218        *limit_to_adjust = (*limit_to_adjust).min(limit);
219        rem_limit -= *limit_to_adjust;
220        divisor -= 1;
221    }
222}
223
224#[cfg(test)]
225mod tests {
226    use super::*;
227
228    #[test]
229    fn test_cap_limits_to_be_under_the_sum_limit() {
230        test([3, 3, 3], 3, [1, 1, 1]);
231        test([3, 2, 1], 3, [1, 1, 1]);
232        test([1, 2, 3], 6, [1, 2, 3]);
233        test([1, 2, 3], 3, [1, 1, 1]);
234        test([1, 8, 100], 6, [1, 2, 3]);
235        test([2, 80, 80], 6, [2, 2, 2]);
236        test([2, 80, 80], 12, [2, 5, 5]);
237
238        #[track_caller]
239        fn test<const N: usize>(mut input: [u32; N], limit: u32, output: [u32; N]) {
240            cap_limits_to_be_under_the_sum_limit(input.each_mut(), limit);
241            assert_eq!(input, output);
242        }
243    }
244}
wgpu_hal/auxil/mod.rs

wgpu_hal/auxil/
mod.rs
